MEMORY-CENTRIC AI INSIGHTS

CXL vs. RDMA over Ethernet for Disaggregated Memory

By Thao Nguyen, Founder & CEOAugust 17, 2026

Two roads lead to disaggregated memory: CXL, a new memory interconnect, and RDMA over standard Ethernet. They differ in programming model, hardware dependency, and — decisively — timeline. Here is how they compare, and why TORmem builds on Ethernet and RDMA today.

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What Is Memory Disaggregation?

By Thao Nguyen, Founder & CEOAugust 16, 2026

Memory disaggregation separates memory from the servers that use it, turning it into a shared pool many servers reach over a fast fabric. This explainer covers the problem it solves, how RDMA over Ethernet makes it practical, why it matters for AI, and how TORmem approaches it.

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HBM Is for Thinking. DDR Is for Remembering.

By Thao Nguyen, Founder & CEOFebruary 2026

A new class of AI systems called world models processes time instead of tokens. These systems require persistent temporal memory far beyond GPU HBM capacity. This post explains why world models break GPU memory limits and introduces Memory-as-Infrastructure for AI Time Context enabled by TORmem.

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Scale-Out Is Breaking

By Thao Nguyen, Founder & CEOJanuary 8, 2026

For more than a decade, scale-out has defined how data centers grow. But modern AI workloads are no longer limited by raw compute—they are limited by memory. In this post, we explore why scale-out is breaking and why memory-centric architecture is the future.

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Why KV Cache Has Become the Real Bottleneck in AI Inference

By Thao Nguyen, Founder & CEOJanuary 4, 2026

GPUs keep getting faster, but inference doesn't scale the way it should. The reason is no longer compute. It's memory—specifically Key-Value (KV) cache. In this post, we explain why KV cache has become the dominant bottleneck in modern AI inference.

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TORmem AI Edge Platform: Memory-Centric Architecture for Real-World Edge AI

By Thao Nguyen, Founder & CEODecember 28, 2025

The TORmem AI Edge Platform is designed to address memory bottlenecks in edge AI. Built on a memory-centric architecture, it enables entry-scale deployments that seamlessly scale to large-memory workloads without redesigning infrastructure.

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The Financial Cost of Memory Inefficiency

By Thao Nguyen, Founder & CEODecember 27, 2025

How Traditional Compute, GPU, and Storage Architectures Waste Enormous Capital — and How TORmem Solves It with Dynamic Memory Allocation.

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AI Edge Systems, Reimagined: How TORmem Delivers Enterprise Inference Performance Without Over-Provisioning

By Thao Nguyen, Founder & CEODecember 23, 2025

TORmem takes a fundamentally different architectural approach—one focused on practical AI inference rather than theoretical peak performance. TORmem systems are designed around a memory-centric architecture that decouples memory growth from GPU constraints, delivers enterprise-grade stability in a compact form factor, and provides predictable, repeatable performance across real workloads.

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Systems Not Software

By Steven White, CTOFebruary 3, 2022

In the world of technology, much of the focus is on software as the center of value. But memory disaggregation is a system problem — one that can only be solved by purpose-built hardware and custom software integrated as a single, cohesive system.

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TORmem Joins OpenCAPI Consortium

By Thao Nguyen, CEODecember 19, 2021

TORmem is proud to announce that we are joining the OpenCAPI consortium, a leading industry group dedicated to enabling the future of low-latency disaggregated memory — adopting the Open Memory Interface (OMI) in our products.

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Building Hardware During a Pandemic

By Steven White, CTOOctober 10, 2021

Building disaggregated memory appliances through a global component shortage. How TORmem designs for availability, multi-sources aggressively, and stays flexible enough to redesign around supply issues that stall larger companies.

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Startup TORmem Unveils High-Speed Networking Roadmap to Disrupt $20 Billion Data Center Market

By PRLogJune 14, 2025

TORmem Inc., a pioneering self-funded startup specializing in memory disaggregation solutions for data centers, today announced an ambitious high-speed networking roadmap that promises to reshape the enterprise switching market. The company unveiled its complete portfolio spanning 100G switches available immediately, 200G and 400G switches entering production in Q4 2025, and 800G switches currently under development – all at 50% less cost than established industry leaders.

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OpenPOWER Foundation and Community Members to showcase at SC22 Conference in Dallas, TX!

By OpenPower FoundationNovember 10, 2022

OPF will be showcasing our LibreBMC project and talking about all things open hardware and software. The best part is that we won't be alone, as we have a number of OPF community members and partners showcasing at our booth as well, including Open Compute Project, Axiado, Raptor Computing, Oregon State University, and TORmem.

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Mashing Up CXL And OpenCAPI For Shared Disaggregated Memory

By Timothy Prickett Morgan, The Next PlatformNovember 7, 2022

The industry is impatient for disaggregated and shared memory for a lot of reasons, and many system architects don't want to wait until PCI-Express 6.0 or 7.0 transports are in the field and the CXL 3.0 and beyond protocols that ride on it to reach out to external memory have been tweaked to do proper sharing across servers.

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WHY DISAGGREGATED MEMORY?